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Introduction
The IRPP3637- 06A is an optimized
POWIR+ TM Chipset reference design,
targeted at low cost, low power
synchronous buck applications up to 6A
output current. The IRPP3637-06A uses
International Rectifier’s IR3637ASPBF
single channel PWM controller in an 8-
pin SOIC and IRF8910PBF dual SO-8
MOSFET. This reference design has
built-in power design expertise
regarding component selection and PCB
layout, and is representative of a
realistic final embedded synchronous
buck design, intended to simplify the
1.25V at a maximum of 6A load current,
using the IRF8910PBF dual SO-8
MOSFET.
The 600kHz switching frequency allows
the selection of reduced size power
components. All the essential
components that contribute to a low cost
compact solution are enclosed by the
rectangular box shown on the PCB,
showing a total solution size of 1.3” x
0.8” (1.0” sq). The electrical connection
diagram is shown in figure 1 and the
corresponding circuit schematic is
shown in figure 2.
design in effort without unnecessary
design iterations. The design is
optimized for 5V input and 1.25V output
@ 6A and 600kHz switching frequency,
including considerations on layout and
passive & magnetic component
selection. The IRPP3637-06A delivers
the complete 6A design in less than
1.0in 2 board area at up to 80% full load
electrical efficiency and up to 85% peak
+12V
External
Vc bias.
(Optional)
(J5)
+12V
External
Vc bias
RTN
(J6)
+5V
(J1)
+5V RTN
(J2)
+1.25V Vout
RTN
(J3)
+1.25V Vout
(J4)
efficiency.
International Rectifier also offers the
Figure 1: IRPP3637-06A Electrical Connection Diagram
Input/Output Connections
POWIR+ Chipset on-line design tool
(http://powirplus.irf.com) allowing the
customization of the IRPP3637-06A
reference design to meet individual
requirements. Based on specific inputs,
the POWIR+ Chipset on-line design tool
will provide a tailored schematic and bill
of materials, from which the engineer
can run a full suite of on-line design
simulations, and then order the fully
assembled and tested customized
reference design (see details on page
14).
Design Details
J1:
J2:
J3:
J4:
J5:
J6:
Input power connection terminal
Input power return preferred
connection terminal
Output power return preferred
connection terminal
Output power connection
terminal
External bias power connection
terminal. This terminal is unused
for standard reference design
configuration.
External bias power return
preferred connection terminal.
This terminal is unused for
standard reference design
configuration.
The IRPP3637-06A reference design is
optimized for an input voltage range of
4.5V to 5.5V and an output voltage of
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RD-0604
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相关PDF资料
IRS2001MPBF
IC DRIVER HIGH/LOW SIDE 16MLPQ
IRS2001SPBF
IC DRIVER HI/LO SIDE 200V 8-SOIC
IRS2003STRPBF
IC DRIVER HALF-BRIDGE 8-SOIC
IRS2004PBF
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IRS2101SPBF
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IC DRIVER HALF-BRIDGE HV 8-SOIC
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